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Saturday, April 10
Registration
09:00 am - 12:00 pm Tutorial and workshop registration
12:00 pm - 01:00 pm LUNCH (for tutorial attendees)
01:00 pm - 06:00 pm Workshop registration
Session 0. Tutorial
Session chair: Andrew B. Kahng (University of California at Los Angeles, CA, USA)
01:00 pm - 03:00 pm Tutorial: ``A Priori Wire Length Estimates Based on Rent's Rule''
Dirk Stroobandt
University of Ghent (Belgium)
03:00 pm - 03:30 pm BREAK
Session 1. Opening session
Session chair: Dirk Stroobandt (University of Ghent, Belgium)
03:30 pm - 03:45 pm Welcome
Andrew B. Kahng
University of California at Los Angeles (CA, USA)
03:45 pm - 04:45 pm Invited talk: "Latency and Rent's Rule"
Wilm E. Donath
IBM T.J. Watson Research Laboratory, Yorktown Heights (NY, USA)
Session 2. Paper session on Wiring estimations
Session chair: Andrew B. Kahng (University of California at Los Angeles, CA, USA)
04:45 pm - 05:10 pm "Wire-length distribution of three-dimensional integrated circuits"
Arifur Rahman, Andy Fan, and Rafael Reif
Massachusetts Institute of Technology, Cambridge (USA)
05:10 pm - 05:35 pm "Interconnection length estimation during hierarchical VLSI design"
Axel Hess and Gerhard Zimmermann
University of Kaiserslautern (Germany)
05:35 pm - 06:00 pm "Wiring space estimation in two-dimensional arrays"
Jun Dong Cho
Sung Kyun Kwan University, Suwon (Korea)
07:00 pm Workshop DINNER
Sunday, April 11
Registration
09:00 am - 12:00 pm Workshop registration
Session 3. Keynote speaker session
Session chair: Andrew B. Kahng (University of California at Los Angeles, CA, USA)
09:00 am - 10:00 am Invited talk: "XXI Century Gigascale Integration (GSI) : The Interconnect Problem"
James D. Meindl
Georgia Institute of Technology, Atlanta (GA, USA)
10:00 am - 10:30 am BREAK
Session 4. Round table session on Rent's rule
Session chair: Andrew B. Kahng (University of California at Los Angeles, CA, USA)
10:30 am - 10:40 am "Theory of massively interconnected systems and Rent's rule"
Pavel L. Barseghyan
DAN Technologies Inc. (Armenia)
10:40 am - 10:50 am "What is Rent's rule?"
Wilm E. Donath
IBM T.J. Watson Research Laboratory, Yorktown Heights (NY, USA)
10:50 am - 11:00 am "Rent's rule: coincidence or the result of the design process?"
Dirk Stroobandt
University of Ghent (Belgium)
11:00 am - 12:00 pm Round table discussion on the position statements
12:00 pm - 01:00 pm LUNCH
Session 5. Paper session on System-Level Interconnect Prediction
Session chair: Dirk Stroobandt (University of Ghent, Belgium)
01:00 pm - 01:25 pm "Estimating and optimizing routing utilization in DSM design"
Philip Chong and Robert K. Brayton
University of California at Berkeley (CA, USA)
01:25 pm - 01:50 pm "Web-based tools for system-level interconnect prediction"
Thomas Grund, Phillip Christie, and Mark D. Butala
Chemnitz University of Technology (Germany) and University of Delaware, Newark (DE, USA)
01:50 pm - 02:15 pm "System-level performance modeling with BACPAC - Berkeley advanced chip performance calculator"
Dennis Sylvester and Kurt Keutzer
University of California at Berkeley (CA, USA)
02:15 pm - 02:40 pm "Floorplanner 1000 times faster: a good predictor and constructor"
A. Ranjan, K. Bazargan, and M. Sarrafzadeh
Northwestern University, Evanston (IL, USA)
02:40 pm - 03:10 pm BREAK
Session 6. Round table session on system-level interconnect prediction
Session chair: Dirk Stroobandt (University of Ghent, Belgium)
03:10 pm - 03:20 pm "Power and area estimation/optimization in behavioral synthesis"
Jun-Dong Cho
Sung Kyun Kwan University, Suwon (Korea)
03:20 pm - 03:30 pm "Can fast algorithms be used as good predictors?"
Majid Sarrafzadeh and Maogang Wang
Northwestern University, Evanston (IL, USA)
03:30 pm - 03:40 pm "On wirelength estimating for hierarchical top-down placement"
Alex Zelikovsky
Georgia State University, Atlanta (GA, USA)
03:40 pm - 05:00 pm Round table discussion on the position statements
Closing session
05:00 pm - 05:30 pm Closing
Dirk Stroobandt
University of Ghent (Belgium)
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