This paper presents an FPGA hardware implementation of a bar
code decoder using the EAN-13 standard.
The design was implemented on a FPGA situated on an ATMEL
FPLSIC (Field Programmable System Level Integrated Circuit,
AT94K40-25DQC). The design has comparable performance and
is in many ways more robust than commercially available devices.
However, to the authors\` knowledge, these all use a microprocessor
while our design is purely dedicated hardware.