In the RESUME project (Reconfigurable Embedded Systems for Use in Multimedia Environments) we explore the benefits of an implementation of scalable multimedia applications using reconfigurable hardware by building an FPGA implementation of a scalable wavelet-based video decoder.
In this article we present the results of our investigation into the hardware implementation of such a scalable video codec. In particular we found that the implementation of the entropy codec is a significant bottleneck. We present an alternative, hardware-friendly algorithm for entropy coding with superior data locality (both temporal and spatial), streaming capabilities, a high degree of parallelism, a small memory footprint and superior compression while maintaining all required scalability properties.
These claims are supported with a full fledged hardware (FPGA) implementation. A really compact implementation was developed which can easily decode the required 50 million symbols per second.