In recent years many methodologies have been proposed for co-designing Field Programmable Gate Array (FPGA) and software systems. In these systems the FPGA is used to accelerate highly parallelisable and time critical parts of the system, while an instruction set processor (ISP) is used for the sequential parts.
Existing systems require a specific programming style of the software developer. This makes it virtually impossible to use legacy software. Some systems require a message-passing interface between threads, and allow threads to migrate between software and FPGA. Other systems give access to the hardware using a specific hardware driver and communication libraries. Yet other systems provide a special compiler to enable hardware acceleration. We propose a system where the original Java source code and even the compiled Java bytecode are left unmodified, and the Java Virtual Machine (JVM) is used for handling the communication with the FPGA.