Dynamic Circuit Specialization (DCS) is used to optimize parts of an application and switch between the specialized parts utilizing Partial Reconfiguration at the run-time. The time needed to reconfigure the FPGA is a limiting factor for DCS. The reconfiguration controller, such as Xilinx Hardware Internal Configuration Access Port (HWICAP), enables an embedded processor to read or write the configuration data into the FPGAs configuration memory through the Internal Configuration Access Port (ICAP). However, it introduces a consequential delay and uses a significant amount of FPGAresources such as LookUp Tables. It is thus the most power hungry part within the DCS system. In our previous contribution, we proposed the Micro-reconfigurable Configuration Access Port (MiCAP), a custom light weight reconfiguration controller specifically designed to implement DCS on the Zynq-SoC FPGA platform, resulting in increased reconfiguration speed and reduced FPGA resources. Even though, both HWICAP and MiCAP suffer froma data-transfer bottleneck during reconfiguration resulting in a reduced throughput by a factor 20× compared to the throughput the ICAP can handle. To further reduce the reconfiguration time, while keeping the DCS capabilities, we propose the MiCAP-Pro that has an AXI-DMA engine. The DMA increases the reconfiguration speed by a factor of 3 over the MiCAP and the HWICAP. However, this improvement costs about four times more FPGA resources than the HWICAP for the AXI DMA engine. We also perform a power and energy analysis of the AXI-HWICAP, MiCAP and MiCAP-Pro. Our results show that the MiCAP and MiCAP-Pro consume nine and four times less energy than the AXI-HWICAP respectively.