These courses will run on the following dates, at STFC Rutherford Appleton Laboratory, UK:
The Vivado course has been updated to version 2016.4 and uses the Digilent ZYBO board. This board is yours to take away at the end of the course.
The Quartus course has had a significant upgrade to cover v16.1 and uses the Terasic DE1-SoC board which, as with the Xilinx course, is yours to take away at the end of the course. This version of Quartus is the first to bear the Intel brand and has the Quartus Prime name, the flow is essentially unchanged from recent versions.
The DE1-SoC is based around the Altera Cyclone V SoC part and features an ARM processor system in addition to the FPGA fabric. Note that we will not make use of the ARM processors during the course.
The FPGA fabric has 85K Logic Elements and is connected to 64MB of off chip memory. There is a further 1GB of DDR3 for the Hard Processor System and the board features the usual array of external connectors, buttons and LEDs.
To book a place on either course, please go to:
Microelectronics Support Centre
Science and Technology Facilities Council
Rutherford Appleton Laboratory
Didcot, OX11 0QX
www (Microelectronics Support Centre) http://www.msc.stfc.ac.uk/
www (Europractice Design Tools) http://www.europractice.stfc.ac.uk