Self-oscillating Sigma Delta modulators are a class of Sigma Delta modulators that combines noise shaping with pulsewidth modulation (PWM). Moreover, in such a modulator, the PWM carrier is generated by a self-oscillation mode that is deliberately introduced. In our approach, this self-oscillation is accurately controlled by a digital delay in the feedback loop. The concept is elaborated for a second-order self-oscillating Sigma Delta modulator with 5-MHz bandwidth. Here, the clock frequency equals 850 MHz, but the loop only has to process signals that are maximally at the self-oscillation frequency (at 106.25 MHz). An additional key element in this design is the use of a feedback FIRDAC which reduces the jitter sensitivity and further relaxes the slewing requirements of the first opamp in the loop. The prototype modulator is fabricated in a 0.18-mu m CMOS process and achieves a dynamic range of 66 dB. Due to the simplicity of the circuit, the modulator core area is only 0.025 mm(2). The power consumption of the modulator is 6 mW.