With the continuously increasing number of cores, on-chip communication has gained a significant role in taking advantage of the multicore chips. Therefore, designing efficient routing algorithms is highly desirable to increase the performance of the Networks-on-Chip (NoC). In comparison with deterministic routing methods, adaptive routing offers better performance by evenly distributing the traffic over the network. Adaptive routing strategies try to avoid congested or malfunctioning areas by dynamically sending the packets through alternative paths based on the network?s congestion condition. The routing algorithm proposed in this paper is mainly based on Hamiltonian path-based strategies for multicast traffic. This method reaches a high degree of adaptiveness by exploiting the eligible minimal paths between the source and the destination. Imposing some restrictions in choosing the potential paths ensures a deadlock- and livelock-free algorithm without using virtual channels. Experimental results demonstrate that the proposed algorithm performs significantly better in terms of latency and power consumption compared to the other adaptive and non-adaptive algorithms. This efficiency is achieved by alleviating congestion across the network.